With the increase of SDR applications, the demand for high bandwidth and processing power also increased. Therefore, the SDR system needs a programmable and scalable multi-core high performance hardware architecture. In this workshop, the student will learn and understand basic working of SDR. The student will also program SDR application on scalable multi-core, programmable and parameterizable High Performance Software Defined Radio system architecture and development environment. Special Features for the Participants: Certificates will be awarded. PEC Continuing Professional Development (CPD) Credit Points will be awarded to the Engineers. Shields will be Presented to Professionals.
UCERD Rawalpindi
Supercomputing Center
UCERD Murree
Software Defined Radio (SDR) is a radio communication technique which executes and process telecommunication applications in software using programmable processing systems.
SDR is considered as the future for digital communication because it provides software level programmability, efficiently uses resources and gives support of artificial intelligence.
Workshop on Software Defined Radio
UCERD Gathering Intellectuals Fostering Innovations Unal Center of Educaiton Research & Development
a) Software installation b) Libraries configuration c) Download Tutorials Tut1, Tut2, Tut3, Tut4, Tut5
3. Operating System and Processing System
a) RISC/GPU/FPGA based multi-core system architecture b) Linux SDR OS (Pentoo Vbox, Skywave Linux)
4. Hands on Projects
a) SDR Frequency Analyzer b) FM Receiver c) FM Transmitter and Receiver d) Video Transmission e) GSM Signal Tracing
1. CPD Workshop on Software Defined Radio at Riphah Int'l University on 1-Apr-2017 by Dr. Tassadaq Hussain http://www.pec.org.pk/Downloadables/cpd/cpd%20PEB%20calenders%202017/PEB-Riphah.pdf
Linux SDR OS (Pentoo Vbox, Skywave Linux) Projects (pdf, labs.zip) a) SDR Frequency Analyzer b) FM Receiver c) FM Transmitter and Receiver d) Video Transmission e) GSM Signal Tracing
Dr. Tassadaq Hussain: He is a permanent faculty member at, Riphah International University. He did his Ph.D. from Barcelona-tech Spain, in collaboration with Barcelona Supercomputing Center and Microsoft Research Center.
He is a member of HiPEAC: European Network on High Performance and Embedded Architecture and Compilation, Barcelona Supercomputing Center and Microsoft ResearchCentre Spain. Until January 2018, he had more than 14 years of industrial experience including, Barcelona Supercomputing Centre Spain, Infineon technology France, Microsoft Research Cambridge, PLDA Italia, IBM Zurich Switzerland, and REPSOL Spain. He has published more than 50 international publications and filed 5 patents.
Tassadaq's main research lines are Machine Learning, Parallel Programming, Heterogeneous Multi-core Architectures, Single board Computers, Embedded Computer Vision, Runtime Resource Aware Architectures, Software Defined Radio and Supercomputing for Artificial Intelligence and Scientific Computing.